1. Technical Field
The embodiment described herein relates to a semiconductor circuit, and more particularly, to a data strobe signal noise protection apparatus and a semiconductor integrated circuit.
2. Related Art
A conventional semiconductor integrated circuit aligns data through a data input and output pad DQ to conform the data with a data strobe signal DQS and writes to a memory cell.
FIG. 1 is a timing diagram of a writing operation of a conventional semiconductor integrated circuit.
As shown in FIG. 1, the conventional semiconductor integrated circuit generates a data strobe signal DQS pulse during a burst operation period and generates ringing. Ringing is understood to be noise in a pulse form that occurs while changing the data strobe signal DQS pulse into high impedance Hi-Z state after a postamble.
The data alignment signals DSR2 and DSF2 are generated in synchronization with a rising edge and falling edge of the data strobe signal DQS. Conventional circuits generate abnormal DSR2 and SDF2 signals due to ringing.
Invalid data created with conventional circuits are latched as alignment data ALGN_R and ALGN_F by the abnormal data alignment signals DSR2 and DSF2, thereby causing a writing error that carries the invalid data on global data lines GIO_E and GIO_O.